TriMedia Nexperia
PNX1300
PNX1500

Philips Semiconductors TriMedia™ very-long instruction word (VLIW) processor
Part Numbers are PNX1300 , PNX1500 , TM1300.
See also Trimedia Video

I am a Video compression Expert with experiance with the TriMedia processor
Please contact me for assistace on TriMedia Related projects. I charge $75 Hr. initial consultation is free.
E-Mail: "SOKOL@tm1300.com " Resume
I also have resources to develope Trimedia Software in Bangalore India.
A fully working board design, and boot code, and working codecs using the TriMedia Software Development Environment (SDE) from Philips.Familiar with TSSA layers.

Documentation

Trimedia SDE
Trimedia SDE brochure
Nexperia Software dev from Momentum Data Systems
Yahoo TriMedia eGroup

Links to TriMedia related companies

Philips Semiconductors (an affiliate of Royal Philips Electronics), building on award-winning TriMedia™ (very-long instruction word) VLIW processor technologies, creates and license new VLIW processor cores and sophisticated software tools and applications for advanced digital consumer products. Examples of these products include digital televisions, advanced set-top boxes, personal video recorders, video editing systems, home networking devices, security and surveillance systems, and videophones.

SPECIFICATIONS	PNX1302(180 MHz)	PNX1502(300 MHz)
Architecture	VLIW	VLIW
Processing Elements	27	37
Instruction Issues	5	5
FPU	Yes	Yes
MFLOPs (Peak)	900	1,400
16x16 MACs (MMAC/s)	360	1,500
8x8 MACs (MMAC/s)	1,440	6,000
MIPS (Peak)	900	1,300
MOPS (Peak)	3,400	10,000
Memory Bus Bandwidth (MB/s)	572	1,600
1K FP cfft (µsec)	105	62
1K 16 bit cfft (µsec)	116	35
1K FP dot product (µsec)	14	5.12
1K 16 bit dot product (µsec)	7.1	2.56
512x512xFP Conv3x3 (msec)	3.64	1.31
512x512x8 bit Conv3x3 (msec)	3.27	0.32
512x512x1 bit Erosion/Dilation (msec)	0.82	0.19

Philips PNX1302 Nexperia (Trimedia)Processor

Continuing a tradition of high-performance, low-cost media processors, the Philips Nexperia (formerly TriMedia™) PNX1302 delivers more processing power to multimedia applications at a lower unit cost. The PNX1302 boosts performance through a faster clock speed and a faster main memory interface than previous Nexperia (TriMedia) processors. Datastream I/O is enhanced with a new on-chip unit for handling audio output in Sony/Philips digital format (SPDIF). Lower power consumption and a smaller footprint contribute to making the PNX1302 a more efficient and compact processing solution.

PNX1302 Features

• Processes audio, video, graphics and communications data-streams on a single chip
  
• Ideal for video-centric multimedia applications
  
• Powerful, fine-grain parallel, 180-200MHz VLIW CPU
  
• Versatile instruction set includes traditional microprocessor, special multimedia SIMD, and IEEE floating-point operations
  
• Comprehensive software development tools enable multimedia application development entirely in the C/C++ programming languages
  
• On-chip, independent, DMA-driven multimedia I/O and coprocessing units offload the CPU
  
• PCI/XIO host bus interface supports glueless interface to PCI and eight-bit microcomputer peripherals, including ROM/Flash, EEPROM, 68K, and x86 devices
  
• 16- and 64-Mbit SDRAM support up to 143 MHz
  
• On-chip DVD playback authentication/descrambling
  
• Application libraries available from Philips and third-party suppliers provide solutions for MPEG-2 decode, Dolby Digital (AC-3) ® decode, and more

• Fine-grain parallel
  
• Optimize parallelism at compile time, not during execution
  
• 5-issue slot engine
  
• 27 pipelined functional units
  
• No special scheduling logic required
  
• Executes up to 5 operations per clock cycle
  
• Breakthrough scheduling compile

Click here to Download DataSheet

Philips Nexperia PNX1502 Processors

Offered by Philips Semiconductors to meet the constant demand for advancment in processor capabilities, the Philips Nexperia PNX1502. This processor handles more formats of audio, video,graphics and communication datastreams than prior Nexperia media processors. With a totally new design for the TriMedia CPU core Philips is able to offer compatibility with leading video standards. The PNX1502 also integrates a TFT LCD controller and an Ethernet 10/100 MAC thus reducing external components and supporting advanced product configurations. With real-time multimedia processing, extensive connectivity options, and support for dynamic power manangement the PNX1502 is the ideal single chip solution for an increasing variety of applications.

PNX1500 Features Summary

Block Diagram

PNX1502

Click here to Download DataSheet

The IBM 440GP Embedded Processor

The PowerPC 440GP embedded processor offers exceptional performance, design flexibility, and robust features geared to demanding networking, storage, and other embedded applications. With speeds of up to 500MHz, PowerPC Book E architecture, and a rich peripheral mix, PowerPC 440GP processors are ideally suited for a wide range of high-performance applications. IBM’s advanced 0.18-micron CMOS copper process technology and an innovative design provide low power dissipation and a small footprint. Application code compatibility with other PowerPC processors enables manufacturers to bring products to market quickly and at a low cost to satisfy changing needs. High integration, including on-chip SRAM and robust peripheral support, can
further simplify board design and help reduce manufacturing costs. PowerPC 440 Core: designed for high performance The leadership performance of the PowerPC 440 core derives from IBM’s state-of-the-art CMOS technology applied to embedded-application requirements. The PowerPC 440 superscalar core incorporates a
7-stage pipeline and executes up to two instructions per cycle, enhancing overall throughput. The core’s large data cache (32K) and instruction cache (32K) are 64-way set associative, with versatile configurations to
enhance performance tuning. The memory management unit (MMU) allows the software developer to configure
cache regions in one of three modes to allow application optimization: locked regions can be used for low-latency code or interrupt service routines; transient regions handle use-once data without disturbing the whole cache; and normal regions, which use typical least-recently-used (LRU) algorithms.

The IBM 440GP Processor

Benefits of the 440GP

The PowerPC 440 Core:

• Is designed for high performance The performance of the PowerPC 440 core derives from IBM’s state-of-the-art CMOS technology applied to embedded-application requirements.
  
• The PowerPC 440 superscalar core incorporates a 7-stage pipeline and executes up to two instructions per cycle, enhancing overall throughput.
  
• The core’s large data cache (32K) and instruction cache (32K) are 64-way set associative, with versatile configurations to enhance performance tuning.
  
• The memory management unit (MMU) allows the software developer to configure cache regions in one of three modes to allow application optimization: locked regions can be used for low-latency code or interrupt service routines; transient regions handle use-once data without disturbing the whole cache; and normal regions, which use typical least-recently-used (LRU) algorithms.
  
• Highlights of the PowerPC 440GP Embedded Processor
  
• Highly integrated processor offers leading-edge performance
  
• Delivers 400MHz to 500MHz performance for high-speed embedded designs
  
• 32-bit implementation of the Book E Enhanced PowerPC® architecture
  
• State-of -the-art peripherals including DDR SDRAM and PCI-X
  
• Incorporates performance enhancing features, including superscalar operation, large L1 caches, and high-speed IBM CoreConnect™ bus technology
  
• Offers low power dissipation and small form factor for high-density and power-conscious applications
  
• Provides application code compatibility with other PowerPC.
  

Block Diagram

PowerPC440GP Block Diagram

Click here to Download DataSheet